This invention relates to an improvement in the surface mounting of a leadless chip carrier to a printed wiring board.
A leadless chip carrier is an integrated circuit package which includes a ceramic substrate on which there is provided a pattern of contact pads. A corresponding pattern of contact pads is provided on a printed wiring board. When the leadless chip carrier is mounted to the printed wiring board, the patterns of contact pads are electrically interconnected.
Various approaches to the mounting and electrical interconnection of a leadless chip carrier to a printed wiring board have been proposed and implemented in the past. All of the known approaches are disadvantageous for one or more reasons. One approach is to provide a connector socket for receiving the leadless chip carrier on the printed wiring board. This approach is relatively expensive. Another approach is to directly solder the contact pads of the leadless chip carrier to the contact pads of the printed wiring board. Since the leadless chip carrier has a ceramic substrate, it has a low coefficient of thermal expansion. Therefore, unless the coefficient of thermal expansion of the printed wiring board matches that of the leadless chip carrier, a reliability problem ensues. Printed wiring boards having a coefficient of thermal expansion matching that of the leadless chip carrier are available, but these are expensive.
Another mounting approach is the use of a Chip Carrier Mounting Device (a trademark of Raychem Corp.) which is an array of high temperature solder wire leads having an imbedded helical copper braid. This array is held in place by a dissolvable carrier which is temporary, the carrier being used to facilitate alignment of the wire leads to the contact pads of the leadless carrier. The carrier is removed after the leads are soldered to the leadless chip carrier. Disadvantages of this approach include the use of the temporary carrier which has a limited shelf life and is adversely affected by humidity. Additionally, limited stress relief is provided by the leads, which limits the size of the leadless chip carrier when implemented on standard printed wiring boards.
Another approach is the use of edge clips, which are created from metal stampings and are available on continuous reels. The edge clips are intended to clip onto the edge of the leadless chip carrier using a spring retention mechanism. Some disadvantages of edge clips are that they do not fit many leadless chip carrier packages and they are frequently difficult to assemble to leadless chip carriers. Additionally, the use of edge clips results in excessively high leadless chip carrier standoffs, which reduces packaging density.
It is therefore an object of the present invention to provide an approach for mounting and electrically interconnecting a leadless chip carrier to a printed wiring board which is economical and which does not possess the disadvantages of the approaches described above.